Design Name | mdrive2 |
Fitting Status | Successful |
Software Version | L.33 |
Device Used | XC9572-15-PC44 |
Date | 6-13-2012, 7:32PM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
30/72 (42%) | 68/360 (19%) | 26/72 (37%) | 7/34 (21%) | 41/144 (29%) |
|
|
Signal mapped onto global clock net (GCK1) | CLK |
Macrocells in high performance mode (MCHP) | 30 |
Macrocells in low power mode (MCLP) | 0 |
Total macrocells used (MC) | 30 |